搜索资源列表
DE2_115_SD_CARD
- DE2_115开发板给出的基于NIOS的SD卡的实例-DE2-115 nios ii s vhdl
2fenpin
- 基于DE2板子上EP4CE115F29C7的2分频的VHDL语言，结构简单，易懂-Based on the DE2 board EP4CE115F29C7 2 points frequency VHDL language, simple structure, and easy to understand
lsled
- 基于DE2板子上EP4CE115F29C7的流水灯的VHDL语言，结构简单，易懂-Based on the DE2 board EP4CE115F29C7 VHDL language of flowing water light, simple structure, and easy to understand
LCDtime
- 基于DE2板子上EP4CE115F29C7的用lcd1602显示时钟的VHDL语言，其显示的内容是时分秒，达到23:59:59后全部归零，重新计时。-Based on the DE2 board EP4CE115F29C7 use lcd1602 display clock VHDL language, its display when the content of the minutes, after reaching 23:59:59 all return to zero, the timi
EP2C70F896C6N-pins
- 将VHDL程序下载到DE2开发板，引脚分配时需要知道的芯片每个引脚功能-VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions
FINAL-LAB04
- VHDL Software (Altera DE2 board) that works as a Hotel Safe Box. When in the open state it will store a combination of 6 inputs between 0 to 3, then it will stay closed until the correct input is placed. -VHDL Software (Altera DE2 board) that works a
LCD-controller---Nghia
- different code for lcd controller using de2 board with vhdl lanuage
Quartus_FPGA_detect
- this a simple VHDL code on quartus that can detect a sequence of binary input, this files contain an DE2 pins assignements -this is a simple VHDL code on quartus that can detect a sequence of binary input, this files contain an DE2 pins assigne
SRAM
- DE2-35 SRAM简单读写VHDL源码，可以通过开发板上拨动开关输入数据，在LED上显示读写情况-DE2-35 SRAM to read and write simple VHDL source code, can input data through the development board to toggle switch, display to read and write in LED.
VGA_DATA
- Create VGA module using VHDL on Altera DE2. It is better if you understand the full theory of VGA.
digital_clk
- VHDL Code for a digital bit clock counter and 7 segment display clock on a altera DE2 board with a cyclone II FPGA
hex7segb
- Implimentation of the switches and 7 segment display bit counter on an Altera DE2 baord via VHDL code on the Cyclone II FPGA
DE2_labs_vhdl
- 基于DE2的VHDL的练习，适合新手熟悉FPGA的编程，了解开发板，设计硬件系统-DE2 of VHDL-based exercises, suitable for novice familiar with FPGA programming, understanding of the development board, hardware design
LCD
- LCD的循环输出，在Quartus二的环境下进行开发，DE2-70的开发板，用VHDL语言编写-LCD de xúnhuán shūchū, zài Quartus èr de huánjìng xià jìnxíng kāifā,DE2-70 de kāifā bǎn, yòng VHDL yǔyán biānxiě
infrastructure.vhd
- infrastructure block for analog loop, vhdl, fpga, de2
DE2_Basic_Computer
- DE2 altera board vhdl design
stopWatch
- 基于VHDL语言数字秒表的实现！使用模块化的设计，包含详细设计说明文档。可在DE2-115开发板上进行验证！-digital stop watch based on VHDL language
99multiply
- 99乘法表,VHDL编写，原理图和代码齐全，仿真和DE2板子都经过测试，可成功运行-99 multiplication table, write by VHDL, simulation and DE2 board have been tested to run successfully
hex-2-led
- 基于VHDL的数码管点亮实验，针对DE2开发板-Digital tube experiments based on VHDL for DE2 board
puerto-Uart-rs232
- UART PORT VHDL USING DE2-115